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New application of SCR based ESD protective structure for VHVIC technology

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F07%3APU70461" target="_blank" >RIV/00216305:26220/07:PU70461 - isvavai.cz</a>

  • Result on the web

  • DOI - Digital Object Identifier

Alternative languages

  • Result language

    angličtina

  • Original language name

    New application of SCR based ESD protective structure for VHVIC technology

  • Original language description

    ESD (electrostatic discharge) protection structures act as a protection of integrated circuits against parasitic electrostatic discharge events. They are located on input or output (I/O) pads. The use of such structures provides better robustness againstESD but also a number of secondary parasitic effects which limit the circuit performance. These effects, for example, limit the bandwidth of processed signals, causes bigger noise or lower gain. Among often used structures belong structures known as SCR(silicon controlled rectifier) or thyristor. Typical application of SCR ESD protections is in submicron CMOS processes. This text is dealing with SCR structure, which was designed for VHVIC (very high voltage integrated circuits) technology.

  • Czech name

    Použití tyristorových struktur v ochranných ESD obvodech pro VHVIC CMOS technologie

  • Czech description

    Výsledky simulací tyristorových snap-back charakteristik pro ochranné struktury v high voltage CMOS technologii

Classification

  • Type

    D - Article in proceedings

  • CEP classification

    JA - Electronics and optoelectronics

  • OECD FORD branch

Result continuities

  • Project

    <a href="/en/project/GD102%2F03%2FH105" target="_blank" >GD102/03/H105: Modern methods of electronic circuit analysis, design and applications</a><br>

  • Continuities

    P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Others

  • Publication year

    2007

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    Moderní metody řešení, návrhu a aplikace elektronických obvodů

  • ISBN

    978-80-214-3535-3

  • ISSN

  • e-ISSN

  • Number of pages

    80

  • Pages from-to

    26-105

  • Publisher name

    Ing. Zdeněk Novotný, Csc

  • Place of publication

    Brno, Ondráčkova 105

  • Event location

    Brno

  • Event date

    Nov 24, 2006

  • Type of event by nationality

    CST - Celostátní akce

  • UT code for WoS article