Introduction to Fixed-point Multiplication and Signal Processing Application

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F09%3APU80921" target="_blank" >RIV/00216305:26220/09:PU80921 - isvavai.cz</a>

Result on the web

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DOI - Digital Object Identifier

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Result language

angličtina

Original language name

Introduction to Fixed-point Multiplication and Signal Processing Application

Original language description

The contribution deals with a binary representation of integer and real numbers. In domain of digital signal processing the number representation is either in fixed-point or floating-point form. In the text the algorithm for unsigned binary multiplication for fixed-point representation is presented. There are many processors with fixed or floating-point representation and there are also several blocks used for arithmetical operations in FPGA. But generally these blocks do not have a large variability interms of bit width. The goal of the contribution is mainly to present an arithmetical model and to evaluate its complexity for a large number of possible implemented algorithms. For testing of product algorithm the multidimensional convolution of gray scale images was performed as well.

Czech name

Introduction to Fixed-point Multiplication and Signal Processing Application

Czech description

The contribution deals with a binary representation of integer and real numbers. In domain of digital signal processing the number representation is either in fixed-point or floating-point form. In the text the algorithm for unsigned binary multiplication for fixed-point representation is presented. There are many processors with fixed or floating-point representation and there are also several blocks used for arithmetical operations in FPGA. But generally these blocks do not have a large variability interms of bit width. The goal of the contribution is mainly to present an arithmetical model and to evaluate its complexity for a large number of possible implemented algorithms. For testing of product algorithm the multidimensional convolution of gray scale images was performed as well.

Type

D - Article in proceedings

CEP classification

JA - Electronics and optoelectronics

OECD FORD branch

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Project

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Continuities

Z - Vyzkumny zamer (s odkazem do CEZ)

Publication year

2009

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection

Proceedings of 19th International Conference Radioelektronika 2009

ISBN

978-1-4244-3536-4

ISSN

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e-ISSN

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Number of pages

4

Pages from-to

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Publisher name

Neuveden

Place of publication

Bratislava (Slovakia)

Event location

Institute for Public Administration

Event date

Apr 22, 2009

Type of event by nationality

EUR - Evropská akce

UT code for WoS article

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