Design of a 10-b Pipelined ADC without calibration

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F11%3APU95441" target="_blank" >RIV/00216305:26220/11:PU95441 - isvavai.cz</a>
Result on the web
—
DOI - Digital Object Identifier
—

Result language
angličtina
Original language name
Design of a 10-b Pipelined ADC without calibration
Original language description
This paper describes the design of a 10-b fully differential pipelined analog-to-digital converter (ADC). The pipelined ADC has been designed using the switched-opamp technique without calibration in a 0.7 um CMOS process for sensor applications. Low power consumption is one of the most important issues. An operational amplifier (opamp) sharing technique was used to decrease the power usage.
Czech name
—
Czech description
—

Project
<a href="/en/project/GAP102%2F11%2F1379" target="_blank" >GAP102/11/1379: Novel Intelligent Submicron Structures and Microsystems for Advanced Microsensors</a><br>
Continuities
S - Specificky vyzkum na vysokych skolach

Publication year
2011
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
Recent Researches in Circuits, Systems, Communications & Computers
ISBN
978-1-61804-056-5
ISSN
—
e-ISSN
—
Number of pages
4
Pages from-to
329-332
Publisher name
WSEAS Press
Place of publication
Tenerife, Španělsko
Event location
Puerto De La Cruz, Tenerife
Event date
Dec 10, 2011
Type of event by nationality
EUR - Evropská akce
UT code for WoS article
—

Similar results(10)