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Fractional-Order Oscillator Design Using Unity-Gain Voltage Buffers and OTAs

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F17%3APU124281" target="_blank" >RIV/00216305:26220/17:PU124281 - isvavai.cz</a>

  • Result on the web

    <a href="http://ieeexplore.ieee.org/document/8052983/" target="_blank" >http://ieeexplore.ieee.org/document/8052983/</a>

  • DOI - Digital Object Identifier

    <a href="http://dx.doi.org/10.1109/MWSCAS.2017.8052983" target="_blank" >10.1109/MWSCAS.2017.8052983</a>

Alternative languages

  • Result language

    angličtina

  • Original language name

    Fractional-Order Oscillator Design Using Unity-Gain Voltage Buffers and OTAs

  • Original language description

    In this study, a new voltage-mode fractional-order oscillator using two unity-gain voltage buffers, two operational transconductance amplifiers, one resistor, and two capacitors is presented. The design procedure of integer-order as well as fractional-order oscillator employing in total 20 MOS transistors is discussed. Effects of fractional-order capacitors on amplitude, phase, condition of oscillation, and frequency of oscillation are shown. Various case examples are given while SPICE simulations using TSMC 0.35 µm level-3 CMOS process parameters with ±1.65 V supply voltages verify their operation and compare with theoretical ones.

  • Czech name

  • Czech description

Classification

  • Type

    D - Article in proceedings

  • CEP classification

  • OECD FORD branch

    20201 - Electrical and electronic engineering

Result continuities

  • Project

    Result was created during the realization of more than one project. More information in the Projects tab.

  • Continuities

    P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Others

  • Publication year

    2017

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    Proceedings of the 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS)

  • ISBN

    978-1-5090-6389-5

  • ISSN

  • e-ISSN

  • Number of pages

    4

  • Pages from-to

    555-558

  • Publisher name

    IEEE

  • Place of publication

    Boston, USA

  • Event location

    Boston

  • Event date

    Aug 6, 2017

  • Type of event by nationality

    WRD - Celosvětová akce

  • UT code for WoS article

    000424694700139