Compact MOS-RC Voltage-Mode Fractional-Order Oscillator Design
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F17%3APU124562" target="_blank" >RIV/00216305:26220/17:PU124562 - isvavai.cz</a>
Result on the web
<a href="http://ieeexplore.ieee.org/document/8093281/" target="_blank" >http://ieeexplore.ieee.org/document/8093281/</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/ECCTD.2017.8093281" target="_blank" >10.1109/ECCTD.2017.8093281</a>
Alternative languages
Result language
angličtina
Original language name
Compact MOS-RC Voltage-Mode Fractional-Order Oscillator Design
Original language description
A new voltage-mode fractional-order oscillator, employing in total 12 Metal-Oxide-Semiconductor (MOS) transistors, is introduced in this paper. The proposed circuit is composed of two operational transconductance amplifiers, two inverting voltage buffers, one resistor, and two fractional-order capacitors. Compared with the corresponding already introduced fractional-order oscillators, it offers the benefit of low transistor count and, therefore, simplicity of its structure. In addition, it offers the well-known advantages of fractional-order oscillators about the capability for achieving very low and high oscillation frequencies with reasonable component values. The behavior of the proposed oscillator has been numerically studied using the MATLAB program, while its performance has been evaluated by SPICE simulations, using TSMC 0.18 um Level-7 CMOS process parameters with ±1 V supply voltages.
Czech name
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Czech description
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Classification
Type
D - Article in proceedings
CEP classification
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OECD FORD branch
20201 - Electrical and electronic engineering
Result continuities
Project
Result was created during the realization of more than one project. More information in the Projects tab.
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2017
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Proceedings of the 2017 23 European Conference on Circuit Theory and Design (ECCTD 2017)
ISBN
978-1-5386-3974-0
ISSN
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e-ISSN
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Number of pages
4
Pages from-to
1-4
Publisher name
IEEE
Place of publication
Catania, Italy
Event location
Catania
Event date
Sep 4, 2017
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
000426983700062