The analysis of reliability of solder joints on SMD ceramic resistor arrays
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F17%3APU124340" target="_blank" >RIV/00216305:26220/17:PU124340 - isvavai.cz</a>
Result on the web
<a href="https://www.scopus.com/record/display.uri?eid=2-s2.0-85029894081&origin=resultslist&sort=plf-f&src=s&st1=Three+ways+to+ceramic+packages&st2=&sid=534787b9a245c56e0a007da102eef45d&sot=b&sdt=b&sl=45&s=TITLE-ABS-KEY%28Three+ways+to+ceramic+packages%29&relpos" target="_blank" >https://www.scopus.com/record/display.uri?eid=2-s2.0-85029894081&origin=resultslist&sort=plf-f&src=s&st1=Three+ways+to+ceramic+packages&st2=&sid=534787b9a245c56e0a007da102eef45d&sot=b&sdt=b&sl=45&s=TITLE-ABS-KEY%28Three+ways+to+ceramic+packages%29&relpos</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/ISSE.2017.8000939" target="_blank" >10.1109/ISSE.2017.8000939</a>
Alternative languages
Result language
angličtina
Original language name
The analysis of reliability of solder joints on SMD ceramic resistor arrays
Original language description
Abstract This paper deals with the area of solder joints reliability and narrower focus is on solder joints on SMD ceramic resistor arrays in configuration 8x0603. These SMD ceramic resistor arrays are soldered on 30 testing boards and every board includes two packages. Testing boards are exposed to influences of temperature changes in the temperature chamber. The range of temperature changes is from -25 °C to 120 °C with 15 minutes time dwell on minimal and maximal temperature. Each SMD ceramic package includes eight independent resistors with zero resistance and there is monitored the conductive connection between each pair of solder joints on each resistor. The main aim is to trace reliability of solder joints depending on the location of solder joints on SMD ceramic package. There is an assumption that the highest reliability of solder joints is in the centre of the package and decreases towards corners of the package. The next section shows computer simulations of testing boards, SMD ceramic packages and solder joints on them. The prerequisite for simulations is to achieve similar conditions such as during temperature cycling in the chamber. This includes same temperature conditions as in the case of the practical experiment and using the model which is close to real SMD ceramic resistor array. The results from the practical experiment are complemented by simulations in ANSYS.
Czech name
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Czech description
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Classification
Type
D - Article in proceedings
CEP classification
—
OECD FORD branch
20201 - Electrical and electronic engineering
Result continuities
Project
—
Continuities
S - Specificky vyzkum na vysokych skolach
Others
Publication year
2017
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Electronics Technology (ISSE), 2017 40th International Spring Seminar
ISBN
978-1-5386-0582-0
ISSN
2161-2528
e-ISSN
—
Number of pages
5
Pages from-to
240-245
Publisher name
IEEE Computer Society
Place of publication
Sofia, Bulgaria
Event location
Sofia
Event date
May 10, 2017
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
000426973000062