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CMOS-RC Colpitts Oscillator Design Using Floating Fractional-Order Inductance Simulator

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F18%3APU128603" target="_blank" >RIV/00216305:26220/18:PU128603 - isvavai.cz</a>

  • Result on the web

    <a href="https://ieeexplore.ieee.org/document/8623859" target="_blank" >https://ieeexplore.ieee.org/document/8623859</a>

  • DOI - Digital Object Identifier

    <a href="http://dx.doi.org/10.1109/MWSCAS.2018.8623859" target="_blank" >10.1109/MWSCAS.2018.8623859</a>

Alternative languages

  • Result language

    angličtina

  • Original language name

    CMOS-RC Colpitts Oscillator Design Using Floating Fractional-Order Inductance Simulator

  • Original language description

    This paper deals with CMOS fractional-order inductance (FoL) simulator design and its utilization in 2.75th-order Colpitts oscillator providing high frequency of oscillation. The proposed floating FoL is composed of two unity-gain current followers (CF +/- s), two inverting voltage buffers, a transconductor, and a fractional-order capacitor (FoC) of order 0.75, while the input intrinsic resistance of CF. is used as design parameter instead of passive resistor. The resulting equivalent inductance value of the FoL can be adjusted via order of FoC, which was emulated via 5th-order Foster II RC network and values optimized using modified least squares quadratic method. In frequency range 138 kHz -2.45 MHz the L. shows +/- 5 degree phase angle deviation. Theoretical results are verified by SPICE simulations using TSMC 0.18 mu m level-7 LO EPI SCN018 CMOS process parameters with +/- 1 V supply voltages.

  • Czech name

  • Czech description

Classification

  • Type

    D - Article in proceedings

  • CEP classification

  • OECD FORD branch

    20201 - Electrical and electronic engineering

Result continuities

  • Project

    Result was created during the realization of more than one project. More information in the Projects tab.

  • Continuities

    P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Others

  • Publication year

    2018

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    Proceedings of the 2018 61st IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)

  • ISBN

    978-1-5386-7392-8

  • ISSN

  • e-ISSN

  • Number of pages

    4

  • Pages from-to

    905-908

  • Publisher name

    IEEE

  • Place of publication

    Windsor, Canada

  • Event location

    Windsor, Canada

  • Event date

    Aug 5, 2018

  • Type of event by nationality

    WRD - Celosvětová akce

  • UT code for WoS article

    000458657500209