Balanced-Output CCCFOA and Its Utilization in Grounded Inductance Simulator with Various Orders

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F18%3APU128476" target="_blank" >RIV/00216305:26220/18:PU128476 - isvavai.cz</a>
Result on the web
<a href="https://ieeexplore.ieee.org/document/8441349/" target="_blank" >https://ieeexplore.ieee.org/document/8441349/</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/TSP.2018.8441349" target="_blank" >10.1109/TSP.2018.8441349</a>

Result language
angličtina
Original language name
Balanced-Output CCCFOA and Its Utilization in Grounded Inductance Simulator with Various Orders
Original language description
In this paper, a new realization of current-controlled current feedback operational amplifier with balanced voltage outputs (BO-CCCFOA) is presented. A resistorless grounded lossless positive inductance simulator (PIS) using two BO-CCCFOAs and a grounded capacitor is reported. The resulting equivalent inductance value of PIS can be adjusted either via change of input intrinsic resistance of BO-CCCFOAs by means of biasing currents or by order of fractional-order capacitor (FoC). FoCs of order γ = (0.25; 0.5; 0.75; 1) were emulated via 5th-order Foster II RC network and values optimized using modified least squares quadratic (MLSQ) method. In frequency range 30 kHz - 30 MHz the obtained phase angle deviation of FoCs and mean values of corresponding relative phase error are below ±1 degree and ±4.3%, respectively. Considering the bandwidth for phase angle deviation less than 3 degree, the proposed fractional-order PIS operates over two decades. The behavior of the PIS circuit with various orders was tested via implementation in RLC ladder prototype of voltage-mode high-pass filter. Theoretical results are verified by SPICE simulations using TSMC 0.18 μm level-7 LO EPI SCN018 CMOS process parameters with ±1 V supply voltages.
Czech name
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Czech description
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Project
Result was created during the realization of more than one project. More information in the Projects tab.
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Publication year
2018
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
Proceedings of the 2018 41st International Conference on Telecommunications and Signal Processing (TSP)
ISBN
978-1-5386-4695-3
ISSN
—
e-ISSN
—
Number of pages
4
Pages from-to
188-191
Publisher name
IEEE
Place of publication
Athens, Greece
Event location
Athens, Greece
Event date
Jul 4, 2018
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
000454845100044

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