Comparative Study of Op-Amp-based Integrators Suitable for Fractional-Order Controller Design
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F19%3APU132417" target="_blank" >RIV/00216305:26220/19:PU132417 - isvavai.cz</a>
Result on the web
<a href="https://ieeexplore.ieee.org/document/8768843" target="_blank" >https://ieeexplore.ieee.org/document/8768843</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/TSP.2019.8768843" target="_blank" >10.1109/TSP.2019.8768843</a>
Alternative languages
Result language
angličtina
Original language name
Comparative Study of Op-Amp-based Integrators Suitable for Fractional-Order Controller Design
Original language description
In this paper, a fractional-order capacitor (FOC) of an order λ = 0.89 (i.e. constant phase angle –80.1 degree) was emulated via Valsa RC network with five branches. The network component values were optimized using modified least squares quadratic method in a wide frequency range of 100 mHz–1 kHz (i.e. 4 decades) and maximum relative phase error 0.78% was obtained. The design specification corresponds to a speed control system of an armature controlled DC motor, which is often used in control theory. Overall performance evaluation shows the product of evaluated key features (e.g. phase angle deviation and absolute values of relative phase, impedance, and pseudocapacitance errors) for the optimized FOC is 13.3% less than the one obtained via Valsa approximation. The behavior of Op-Amp-based non-inverting configurations of analogue fractional-order integral operator s– employing the optimized FOC, where 0 < λ< 1, is compared. The behavior of studied integrator circuits is confirmed by SPICE simulations using the readily available Texas Instruments TL072 low-noise Op-Amp macromodel, which is commonly used in electronics.
Czech name
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Czech description
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Classification
Type
D - Article in proceedings
CEP classification
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OECD FORD branch
20205 - Automation and control systems
Result continuities
Project
<a href="/en/project/LTC18022" target="_blank" >LTC18022: Analogue fractional systems, their synthesis and analysis</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>S - Specificky vyzkum na vysokych skolach
Others
Publication year
2019
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Proceedings of the 2019 42nd International Conference on Telecommunications and Signal Processing (TSP), Budapest, Hungary
ISBN
978-1-7281-1864-2
ISSN
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e-ISSN
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Number of pages
4
Pages from-to
740-743
Publisher name
IEEE
Place of publication
Budapest, Hungary
Event location
Budapest, Hungary
Event date
Jul 1, 2019
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
000493442800160