Multiple-input Bulk-driven Quasi-floating-gate MOS transistor for low-voltage low-power integrated circuits
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F19%3APU130174" target="_blank" >RIV/00216305:26220/19:PU130174 - isvavai.cz</a>
Alternative codes found
RIV/68407700:21460/19:00340711
Result on the web
<a href="https://doi.org/10.1016/j.aeue.2018.12.023" target="_blank" >https://doi.org/10.1016/j.aeue.2018.12.023</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1016/j.aeue.2018.12.023" target="_blank" >10.1016/j.aeue.2018.12.023</a>
Alternative languages
Result language
angličtina
Original language name
Multiple-input Bulk-driven Quasi-floating-gate MOS transistor for low-voltage low-power integrated circuits
Original language description
This brief presents the first experimental results of the multiple-input bulk-driven quasi-floating-gate (MI-BD-QFG) MOS transistor (MOST) which is suitable for low-voltage (LV) low-power (LP) integrated circuits design. The MI-BD-QFG MOST is an extension to the principle of the bulk-driven quasi-floating-gate (BD-QFG) MOST. However, unlike the BD-QFG the MI-BD-QFG MOST offers multiple-input that simplifies specific CMOS topologies and reduce their power consumption. To confirm the advantages of the MI-BD-QFG MOST a Differential Difference Current Conveyor (DDCC) with very simple CMOS structure has been designed and fabricated in a standard n-well 0.18 µm CMOS process from TSMC with total chip area 350 µm x 78 µm. The fabricated circuit uses a 0.5 V power supply, consumes 1.7 µW power and offers near rail-to-rail input common mode range.
Czech name
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Czech description
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Classification
Type
J<sub>imp</sub> - Article in a specialist periodical, which is included in the Web of Science database
CEP classification
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OECD FORD branch
20201 - Electrical and electronic engineering
Result continuities
Project
<a href="/en/project/LO1401" target="_blank" >LO1401: Interdisciplinary Research of Wireless Technologies</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2019
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Name of the periodical
AEU - International Journal of Electronics and Communications
ISSN
1434-8411
e-ISSN
1618-0399
Volume of the periodical
100
Issue of the periodical within the volume
, IF: 2.115
Country of publishing house
DE - GERMANY
Number of pages
7
Pages from-to
32-38
UT code for WoS article
000460368700005
EID of the result in the Scopus database
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