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Flux-Controlled Memristor Emulator and Its Experimental Results

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F20%3APU134628" target="_blank" >RIV/00216305:26220/20:PU134628 - isvavai.cz</a>

  • Result on the web

    <a href="https://doi.org/10.1109/TVLSI.2020.2966292" target="_blank" >https://doi.org/10.1109/TVLSI.2020.2966292</a>

  • DOI - Digital Object Identifier

    <a href="http://dx.doi.org/10.1109/TVLSI.2020.2966292" target="_blank" >10.1109/TVLSI.2020.2966292</a>

Alternative languages

  • Result language

    angličtina

  • Original language name

    Flux-Controlled Memristor Emulator and Its Experimental Results

  • Original language description

    A flux-controlled memristor emulator built with off-the-shelf electronic devices and based on a TiO₂ model is presented in this article. The circuit proposed in this article uses the current mode approach based analog building blocks such as a second-generation current conveyor (CCII) and an operational transconductance amplifier (OTA) as an active element with few passive elements. The circuit shows a clear fingerprint of an ideal memristor. The offered emulator circuit can be made to operate in incremental and decremental modes and functions well up to 26.3 MHz. Nonvolatility, Monte Carlo sampling, and corner analysis simulations are executed to verify the robustness of the circuit. The functional verification of the presented circuit is performed using the 0.18-μm CMOS parameter at a supply voltage of ±1.2 V. The experimental demonstration is carried out by making a prototype on a breadboard using ICs AD844AN and CA3080, which exhibits a good agreement with theoretical and simulation results. The layout of the circuit, which requires a total chip area of 75 x 70 μm², is also created. Single/parallel combinations of a memristor, a high-pass filter, and a chaotic system are presented to demonstrate its application.

  • Czech name

  • Czech description

Classification

  • Type

    J<sub>imp</sub> - Article in a specialist periodical, which is included in the Web of Science database

  • CEP classification

  • OECD FORD branch

    20201 - Electrical and electronic engineering

Result continuities

  • Project

  • Continuities

    S - Specificky vyzkum na vysokych skolach

Others

  • Publication year

    2020

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Name of the periodical

    IEEE Trans. on VLSI Systems.

  • ISSN

    1063-8210

  • e-ISSN

    1557-9999

  • Volume of the periodical

    28

  • Issue of the periodical within the volume

    4, IF: 2.037

  • Country of publishing house

    US - UNITED STATES

  • Number of pages

    12

  • Pages from-to

    1050-1061

  • UT code for WoS article

    000522421700017

  • EID of the result in the Scopus database