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VHDL-based implementation of CRYSTALS-Kyber components on FPGA

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F22%3APU144443" target="_blank" >RIV/00216305:26220/22:PU144443 - isvavai.cz</a>

  • Result on the web

    <a href="https://www.eeict.cz/eeict_download/archiv/sborniky/EEICT_2022_sbornik_2_v2.pdf" target="_blank" >https://www.eeict.cz/eeict_download/archiv/sborniky/EEICT_2022_sbornik_2_v2.pdf</a>

  • DOI - Digital Object Identifier

Alternative languages

  • Result language

    angličtina

  • Original language name

    VHDL-based implementation of CRYSTALS-Kyber components on FPGA

  • Original language description

    CRYSTALS-Kyber is one of the finalists of the National Institute of Standards and Technology (NIST) post-quantum cryptography competition. In this paper, we deal with effective hardware-accelerated implementations of components intended for the use in the FPGA implementation of the above-mentioned lattice-based cryptography scheme. The discussed components are NTT, inverse NTT, CBD and the Parse Algorithm. The improved implementation of NTT (NTT-1) requires 1189 (1568) Look-Up Tables (LUTs), 1469 (2161) Flip-Flops (FFs), 28 (50) Digital Signal Processing blocks (DSPs) and 1.5 (1.5) Block Memories (BRAMs). The latency of the design is 322 (334) clock cycles at the frequency 637 MHz which makes the presented NTT (NTT-1) implementations to be currently the fastest ones. The implementations of the sampling functions (CBD and Parse) requires less than 100 LUTs and FFs with maximum latency 5 clock cycles at the frequencies over 700 Mhz. All implementations has been synthesized for the Xilinx Virtex UltraScale+ architecture.

  • Czech name

  • Czech description

Classification

  • Type

    D - Article in proceedings

  • CEP classification

  • OECD FORD branch

    20206 - Computer hardware and architecture

Result continuities

  • Project

    <a href="/en/project/VJ02010010" target="_blank" >VJ02010010: Tools for AI-enhanced Security Verification of Cryptographic Devices</a><br>

  • Continuities

    S - Specificky vyzkum na vysokych skolach

Others

  • Publication year

    2022

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    Proceedings II of the 28th Conference STUDENT EEICT 2022 Selected Papers

  • ISBN

    978-80-214-6030-0

  • ISSN

  • e-ISSN

  • Number of pages

    5

  • Pages from-to

    297-301

  • Publisher name

    Brno University of Technology, Faculty of Electrical Engineering and Communication

  • Place of publication

    Brno

  • Event location

    Brno

  • Event date

    Apr 26, 2022

  • Type of event by nationality

    WRD - Celosvětová akce

  • UT code for WoS article