MOS Transistor as a Distributed Resistive-Capacitive Element with Admittance of Fractional Order 0.5

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F26%3A0197078" target="_blank" >RIV/00216305:26220/26:0197078 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Result language
angličtina
Original language name
MOS Transistor as a Distributed Resistive-Capacitive Element with Admittance of Fractional Order 0.5
Original language description
MOS transistor as a uniform distributed layer structure providing an input admittance of the fractional order of 0.5 is described. For the selected native n-channel MOS device in TSMC 65 nm technology, a circuit model including distributed channel resistance and distributed capacitance between gate, channel and bulk (body) is presented. The lumped parasitic resistances and capacitances of the electrodes are also considered in the model. The procedure for calculating the input admittance of the model based on the admittance matrix containing the transistor parameters is given. Magnitude and phase responses of the input admittance of the transistor depending on its dimensions and other, especially parasitic, properties are presented and analyzed. It is found that the half-order admittance appears in a certain frequency band and outside this band there is a deviation of the admittance phase from the required 45 degrees. The causes of these deviations and the possibility of their correction are discussed.
Czech name
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Czech description
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Project
<a href="/en/project/GA23-06070S" target="_blank" >GA23-06070S: Fundamental research on designing of CMOS fractional-order elements</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Publication year
2024
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
Proceedings of the 16th International Congress on Ultra Modern Telecommunications and Control Systems
ISBN
978-3-8007-6544-7
ISSN
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e-ISSN
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Number of pages
6
Pages from-to
1-6
Publisher name
VDE
Place of publication
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Event location
Meloneras, Gran Canaria, Spain
Event date
Nov 26, 2024
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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