Algebraic Analysis of Feedback Loop Dependencies in Order of Improving RTL Digital Circuit Testability

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F03%3APU42517" target="_blank" >RIV/00216305:26230/03:PU42517 - isvavai.cz</a>

Result on the web

—

DOI - Digital Object Identifier

—

Result language

angličtina

Original language name

Algebraic Analysis of Feedback Loop Dependencies in Order of Improving RTL Digital Circuit Testability

Original language description

The existence of loops in a circuit structure causes problems in both test generation and application. When nested loops occur in the circuit, it is necessary to break the most nested one(s) to improve circuit testability significantly, with minimal design cost. The paper deals with a new method of detecting and breaking loops in the register-transfer level (RTL) digital circuit structure.

Czech name

—

Czech description

—

Type

D - Article in proceedings

CEP classification

JC - Computer hardware and software

OECD FORD branch

—

Project

<a href="/en/project/GA102%2F01%2F1531" target="_blank" >GA102/01/1531: Formal approaches in digital circuit diagnostics - testable design verification</a><br>

Continuities

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Publication year

2003

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection

Proceedings of IEEE Workshop on Design and Diagnostic of Electronic Circuits and Systems

ISBN

83-7143-557-6

ISSN

—

e-ISSN

—

Number of pages

2

Pages from-to

303-304

Publisher name

Publishing House of Poznan University of Technology

Place of publication

Poznan

Event location

Poznaň, hotel Trawinski

Event date

Apr 14, 2003

Type of event by nationality

WRD - Celosvětová akce

UT code for WoS article

—