Polymorphic Gates in Design and Test of Digital Circuits
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F08%3APU76687" target="_blank" >RIV/00216305:26230/08:PU76687 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Alternative languages
Result language
angličtina
Original language name
Polymorphic Gates in Design and Test of Digital Circuits
Original language description
Polymorphic gates are unconventional logic components which can switch their logic functions according to changing environment. The first part of this study presents an evolutionary approach to the design of polymorphic modules which exhibit different logic functions in different environments. The most complicated circuit that we evolved contains more than 100 gates. The second part of this study shows how to reduce the number of test vectors of a digital circuit by replacing some of its gates by polymorphic gates. In the first polymorphic mode, the circuit implements the original function. When switched to the second polymorphic mode, it can be tested using fewer test vectors than in the first polymorphic mode; however, the same fault coverage is obtained. The number of test vectors was reduced on 50-91% of its original volume for six benchmark circuits. The paper also discusses various obstacles which one has to deal with during a practical utilization of polymorphic gates. <br>
Czech name
Polymorfní hradla v návrhu a testování číslicových obvodů
Czech description
Polymorfní hradla jsou nekonvenční výpočetní elementy, které mění svoji logickou funkci na základě prostředí, ve kterém se nacházejí. Článek popisuje využití těchto hradel pro návrh adaptivních obvodů a v oblasti testování číslicových obvodů.
Classification
Type
J<sub>x</sub> - Unclassified - Peer-reviewed scientific article (Jimp, Jsc and Jost)
CEP classification
JC - Computer hardware and software
OECD FORD branch
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Result continuities
Project
<a href="/en/project/GA102%2F06%2F0599" target="_blank" >GA102/06/0599: Methods of polymorphic digital circuit design</a><br>
Continuities
Z - Vyzkumny zamer (s odkazem do CEZ)
Others
Publication year
2008
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Name of the periodical
International Journal of Unconventional Computing
ISSN
1548-7199
e-ISSN
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Volume of the periodical
4
Issue of the periodical within the volume
2
Country of publishing house
US - UNITED STATES
Number of pages
18
Pages from-to
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UT code for WoS article
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EID of the result in the Scopus database
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