All

What are you looking for?

All
Projects
Results
Organizations

Quick search

  • Projects supported by TA ČR
  • Excellent projects
  • Projects with the highest public support
  • Current projects

Smart search

  • That is how I find a specific +word
  • That is how I leave the -word out of the results
  • “That is how I can find the whole phrase”

Towards Design Flow for Space-Efficient Implementation of Polymorphic Circuits Based on Ambipolar Components

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F17%3APU126433" target="_blank" >RIV/00216305:26230/17:PU126433 - isvavai.cz</a>

  • Result on the web

    <a href="http://www.fit.vutbr.cz/research/pubs/all.php?id=11476" target="_blank" >http://www.fit.vutbr.cz/research/pubs/all.php?id=11476</a>

  • DOI - Digital Object Identifier

Alternative languages

  • Result language

    angličtina

  • Original language name

    Towards Design Flow for Space-Efficient Implementation of Polymorphic Circuits Based on Ambipolar Components

  • Original language description

    Main objective of this contribution is to present a unified design flow for an efficient implementation of polymorphic circuits. First of all, it employs an evolutionary inspired techniques that facilitates the creation of multifunctional circuit elements (i.e. logic gates) based on emerging materials and nano-structures exhibiting the ambipolar behavior. Those logic gates consists of individual transistors where the conduction mode (N- or P-channel) is controlled by switching the power rails. Unfortunately, conventional design methods and algorithms are not directly applicable for a design of polymorphic circuits without the need to face major changes. Hence the other important part of the suggested design flow is comprising the necessary circuit synthesis technique using those multifunctional logic gates. The presented circuit synthesis approach makes it feasible to achieve an area-efficient results in case of complex polymorphic circuit involving hundreds of gates. Its core is based on the utilization of Boolean division principles and function kernelling technique.

  • Czech name

  • Czech description

Classification

  • Type

    J<sub>ost</sub> - Miscellaneous article in a specialist periodical

  • CEP classification

  • OECD FORD branch

    10201 - Computer sciences, information science, bioinformathics (hardware development to be 2.2, social aspect to be 5.8)

Result continuities

  • Project

    Result was created during the realization of more than one project. More information in the Projects tab.

  • Continuities

    P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Others

  • Publication year

    2017

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Name of the periodical

    ElectroScope - http://www.electroscope.zcu.cz

  • ISSN

    1802-4564

  • e-ISSN

  • Volume of the periodical

    11

  • Issue of the periodical within the volume

    1

  • Country of publishing house

    CZ - CZECH REPUBLIC

  • Number of pages

    10

  • Pages from-to

    1-10

  • UT code for WoS article

  • EID of the result in the Scopus database