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Synthesis Methodology of Polymorphic Circuits Using Polymorphic NAND/NOR Gates

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F15%3APU116972" target="_blank" >RIV/00216305:26230/15:PU116972 - isvavai.cz</a>

  • Result on the web

    <a href="http://dx.doi.org/10.1109/UKSim.2015.82" target="_blank" >http://dx.doi.org/10.1109/UKSim.2015.82</a>

  • DOI - Digital Object Identifier

    <a href="http://dx.doi.org/10.1109/UKSim.2015.82" target="_blank" >10.1109/UKSim.2015.82</a>

Alternative languages

  • Result language

    angličtina

  • Original language name

    Synthesis Methodology of Polymorphic Circuits Using Polymorphic NAND/NOR Gates

  • Original language description

    In this paper, a novel approach dealing with the issues of multifunctional (polymorphic) logic circuits synthesis is presented. Crucial notion behind the polymorphic concept resides in the fact that such kind of circuit is able to perform more than one logic function, while the underlying structure keeps its arrangement untouched. The outlined behaviour is established by means of utilizing special multifunctional components (gates) during circuit design phase, where the individual connections among them remains unchanged (no reconfiguration takes place). The exact function, which the circuit is purposely executing at a given moment, is determined by the actual operating environment (e.g. supply voltage, temperature or a special signal). The proposed synthesis method is based on a formal Boolean representation of corresponding functions. Its main advantage can be recognized in strictly rigid and algorithmic notation with the employment of minimization techniques, which is in a direct contrast to competitive solutions, predominantly based on heuristic approaches.

  • Czech name

  • Czech description

Classification

  • Type

    D - Article in proceedings

  • CEP classification

  • OECD FORD branch

    20206 - Computer hardware and architecture

Result continuities

  • Project

    Result was created during the realization of more than one project. More information in the Projects tab.

  • Continuities

    P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Others

  • Publication year

    2015

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    Proceedings on UKSim-AMSS 17th International Conference on Computer Modelling ans Simulation

  • ISBN

    978-1-4799-8713-9

  • ISSN

  • e-ISSN

  • Number of pages

    6

  • Pages from-to

    612-617

  • Publisher name

    IEEE Computer Society

  • Place of publication

    Cambridge

  • Event location

    Cambridge

  • Event date

    Mar 25, 2015

  • Type of event by nationality

    WRD - Celosvětová akce

  • UT code for WoS article

    000411860000069