Evolution of Synthetic RTL Benchmark Circuits with Predefined Testability

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F08%3APU76736" target="_blank" >RIV/00216305:26230/08:PU76736 - isvavai.cz</a>

Result on the web

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DOI - Digital Object Identifier

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Result language

angličtina

Original language name

Evolution of Synthetic RTL Benchmark Circuits with Predefined Testability

Original language description

This article presents a new real-world application of evolutionary computing in the area of digital-circuits testing. A method is described which enables to evolve large synthetic RTL benchmark circuits with a predefined structure and testability. Usingthe proposed method, a new collection of synthetic benchmark circuits was developed. These benchmark circuits will be useful in a validation process of novel algorithms and tools in the area of digital-circuits testing. Evolved benchmark circuits currently represent the most complex benchmark circuits with a known level of testability. Furthermore, these circuits are the largest that have ever been designed by means of evolutionary algorithms. This work also investigates suitable parameters of the evolutionary algorithm for this problem and explores the limits in the complexity of evolved circuits.

Czech name

Evolution of Synthetic RTL Benchmark Circuits with Predefined Testability

Czech description

Článek představuje novou aplikaci evolučních algoritmů v oblasti testování číslicových obvodů. Popisuje metodu, která umožňuje navrhovat složité testovací obvody s požadovanými vlastnostmi z hlediska diagnostiky. Metoda byla použita k vytvoření nové sadybenchmarkových obvodů. Jedná se o největší obvody doposud navržené evolučními algoritmy.

Type

J_x - Unclassified - Peer-reviewed scientific article (Jimp, Jsc and Jost)

CEP classification

JC - Computer hardware and software

OECD FORD branch

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Project

Result was created during the realization of more than one project. More information in the Projects tab.

Continuities

Z - Vyzkumny zamer (s odkazem do CEZ)

Publication year

2008

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Name of the periodical

ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS

ISSN

1084-4309

e-ISSN

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Volume of the periodical

13

Issue of the periodical within the volume

3

Country of publishing house

US - UNITED STATES

Number of pages

21

Pages from-to

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UT code for WoS article

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EID of the result in the Scopus database

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