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Evolutionary hardware design (Invited Paper)

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F11%3APU96089" target="_blank" >RIV/00216305:26230/11:PU96089 - isvavai.cz</a>

  • Result on the web

  • DOI - Digital Object Identifier

Alternative languages

  • Result language

    angličtina

  • Original language name

    Evolutionary hardware design (Invited Paper)

  • Original language description

    Since the early 1990's researchers have begun to apply evolutionary algorithms to synthesize electronic circuits. Nowadays it is evident that the evolutionary design approach can automatically create efficient electronic circuits in many domains. This paper surveys fundamental concepts of evolutionary hardware design. It introduces relevant search algorithms such as Cartesian genetic programming (CGP). Several case studies are presented demonstrating strength and weakness of the method. Target domains are combinational circuit synthesis where the goal is to minimize the number of gates, image filter design intended for field programmable gate arrays (FPGAs) where the goal is to obtain the quality of filtering of conventional methods for a significantlylower cost on a chip and evolution of benchmark circuits for evaluation of testability analysis methods. Evolved circuits are compared with the best-known conventional designs. FPGAs are presented as accelerators for evolutionary circuit

  • Czech name

  • Czech description

Classification

  • Type

    D - Article in proceedings

  • CEP classification

    JC - Computer hardware and software

  • OECD FORD branch

Result continuities

  • Project

    <a href="/en/project/GAP103%2F10%2F1517" target="_blank" >GAP103/10/1517: Natural Computing on Unconventional Platforms</a><br>

  • Continuities

    Z - Vyzkumny zamer (s odkazem do CEZ)<br>S - Specificky vyzkum na vysokych skolach

Others

  • Publication year

    2011

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    VLSI Circuits and Systems V

  • ISBN

    978-0-8194-8656-1

  • ISSN

  • e-ISSN

  • Number of pages

    11

  • Pages from-to

    1-11

  • Publisher name

    SPIE - the international society for optics and photonics

  • Place of publication

    Bellingham

  • Event location

    Praha

  • Event date

    Apr 18, 2011

  • Type of event by nationality

    WRD - Celosvětová akce

  • UT code for WoS article