Analysis and Comparison of Functional Verification and ATPG for Testing Design Reliability
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F13%3APU106327" target="_blank" >RIV/00216305:26230/13:PU106327 - isvavai.cz</a>
Result on the web
—
DOI - Digital Object Identifier
—
Alternative languages
Result language
angličtina
Original language name
Analysis and Comparison of Functional Verification and ATPG for Testing Design Reliability
Original language description
As the complexity of current hardware systems rises rapidly, it is a challenging task to harden these systems against faults and to complete their verification and manufacturing test. Not only that verification and testing take a considerable amount of time but the number of design errors, faults, manufacturing defects and crosstalks increases with the rising complexity as well. Furthermore, when a system is designed to be reliable new issues come into play making the picture even more complex. In this paper we performed a detailed analysis of two approaches devoted to verification of hardened systems, with respect to the test set generation: the first one is based on classical Automatic Test Pattern Generation, the second one on Constrained-random Stimulus Generation. We evaluated their qualities as well as their drawbacks and introduced few ideas about their combination in order to create a new promising approach for verification of reliable systems.
Czech name
—
Czech description
—
Classification
Type
D - Article in proceedings
CEP classification
—
OECD FORD branch
10201 - Computer sciences, information science, bioinformathics (hardware development to be 2.2, social aspect to be 5.8)
Result continuities
Project
Result was created during the realization of more than one project. More information in the Projects tab.
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>Z - Vyzkumny zamer (s odkazem do CEZ)<br>S - Specificky vyzkum na vysokych skolach
Others
Publication year
2013
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits and Systems
ISBN
978-1-4673-6133-0
ISSN
—
e-ISSN
—
Number of pages
4
Pages from-to
275-278
Publisher name
IEEE Computer Society
Place of publication
Karlovy Vary
Event location
Karlovy Vary
Event date
Apr 8, 2013
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
—