Cartesian Genetic Programming as Local Optimizer of Logic Networks
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F14%3APU111924" target="_blank" >RIV/00216305:26230/14:PU111924 - isvavai.cz</a>
Result on the web
<a href="http://www.fit.vutbr.cz/research/pubs/all.php?id=10504" target="_blank" >http://www.fit.vutbr.cz/research/pubs/all.php?id=10504</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/CEC.2014.6900326" target="_blank" >10.1109/CEC.2014.6900326</a>
Alternative languages
Result language
angličtina
Original language name
Cartesian Genetic Programming as Local Optimizer of Logic Networks
Original language description
Logic synthesis and optimization methods work either globally on the whole logic network or locally on preselected subnetworks. Evolutionary design methods have already been applied to evolve and optimize logic circuits at the global level. In this paper, we propose a new method based on Cartesian genetic programming (CGP) as a local area optimizer in combinational logic networks. First, a subcircuit is extracted from a complex circuit, then the subcircuit is optimized by CGP and finally the optimized subcircuit replaces the original one. The procedure is repeated until a termination criterion is satisfied. We present a performance comparison of local and global evolutionary optimization methods with a conventional approach based on ABC and analyze these methods using differently pre-optimized benchmark circuits. If a sufficient time is available, the proposed locally optimizing CGP gives better results than other locally operating methods reported in the literature; however, its performance is significantly worse than the evolutionary global optimization.
Czech name
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Czech description
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Classification
Type
D - Article in proceedings
CEP classification
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OECD FORD branch
20206 - Computer hardware and architecture
Result continuities
Project
<a href="/en/project/GA14-04197S" target="_blank" >GA14-04197S: Advanced Methods for Evolutionary Design of Complex Digital Circuits</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2014
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
2014 IEEE Congress on Evolutionary Computation
ISBN
978-1-4799-1488-3
ISSN
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e-ISSN
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Number of pages
8
Pages from-to
2901-2908
Publisher name
IEEE Computational Intelligence Society
Place of publication
Beijing
Event location
Beijing
Event date
Jul 6, 2014
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
000356684604023