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Reconfigurable Digital Circuits Based on Chip Expander with Integrated Temperature Regulation

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F15%3APU117073" target="_blank" >RIV/00216305:26230/15:PU117073 - isvavai.cz</a>

  • Result on the web

    <a href="http://www.scirp.org/journal/PaperDownload.aspx?paperID=61318" target="_blank" >http://www.scirp.org/journal/PaperDownload.aspx?paperID=61318</a>

  • DOI - Digital Object Identifier

    <a href="http://dx.doi.org/10.4236/jcc.2015.311027" target="_blank" >10.4236/jcc.2015.311027</a>

Alternative languages

  • Result language

    angličtina

  • Original language name

    Reconfigurable Digital Circuits Based on Chip Expander with Integrated Temperature Regulation

  • Original language description

    This article is dealing with a development of custom chip expander platform with the possibility of accurate temperature control and integration of additional silicon-based features. Such platform may serve as a useful tool which facilitates the burdens connected with measurement and analysis tasks of experimental semiconductor structures. The devised solution provides the functionality of carrier substrate (Al2O3 compound) with CTE compatibility to the experimental silicon chip and is fully customizable with respect to a particular chip. It also allows achieving an easy fan-out of small-diameter chip terminals into a larger, more convenient area and placement of chip specimens conveniently into space-constrained chamber of the AFM microscopes, probe stations, etc. Real application of the developed chip expander platform is demonstrated in context of digital reconfigurable circuits based on polymorphic electronics. In this case the chip expander with attached polymorphic chip REPOMO is thermally stabilized at an ambient temperature level up to approximately 135C and its sensitivity to this phenomenon is demonstrated.

  • Czech name

  • Czech description

Classification

  • Type

    J<sub>ost</sub> - Miscellaneous article in a specialist periodical

  • CEP classification

  • OECD FORD branch

    20206 - Computer hardware and architecture

Result continuities

  • Project

    Result was created during the realization of more than one project. More information in the Projects tab.

  • Continuities

    P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Others

  • Publication year

    2015

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Name of the periodical

    Journal of Computer and Communications

  • ISSN

    2327-5227

  • e-ISSN

  • Volume of the periodical

    3

  • Issue of the periodical within the volume

    11

  • Country of publishing house

    CN - CHINA

  • Number of pages

    7

  • Pages from-to

    169-175

  • UT code for WoS article

  • EID of the result in the Scopus database