On the Synthesis of Multifunctional Logic Circuits

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F15%3APU117297" target="_blank" >RIV/00216305:26230/15:PU117297 - isvavai.cz</a>

Result on the web

<a href="http://dx.doi.org/10.13140/RG.2.1.2202.9840" target="_blank" >http://dx.doi.org/10.13140/RG.2.1.2202.9840</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.13140/RG.2.1.2202.9840" target="_blank" >10.13140/RG.2.1.2202.9840</a>

Result language

angličtina

Original language name

On the Synthesis of Multifunctional Logic Circuits

Original language description

Nowadays, it is possible to identify a lot of application areas where a circuit with the ability to perform different functions according to a particular situation may prove to be a very efficient means of solution. The most straightforward approach, how to address this challenge, is to design as many different circuits, as the overall number of functions that are actually needed in a given situation. As a next step involved within the execution flow, individual outputs of these circuits are switched in such way that only the currently required function will be taken into account. However, main drawback of this approach can be easily recognized within the resulting size of the target implementation on a circuit level. Recent advancements within the field of digital design techniques and components for digital circuits provide a vital evidence that yet another feasible strategy may be employed - area and time-efficient design of multifunctional circuits based on utilization of individual structural elements with multifunctional features. In this case, the entity of multifunctional circuit is devised as a compact structure involving set of multifunctional components, where their low-level interconnection scheme remains untouched in all allowable operating modes and only the active function of these components is expected to change intentionally. Simple circuits could be obviously designed by hand but the growing complexity renders this approach virtually unfeasible. Proper synthesis techniques have to be obviously considered. With this drawback in mind, main goal of this article is to propose completely new approach involving so called Boolean divisors identification and function kernelling techniques. New synthesis method for polymorphic circuits will be introduced together with the discussion of the achieved results.

Czech name

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Czech description

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Type

D - Article in proceedings

CEP classification

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OECD FORD branch

20206 - Computer hardware and architecture

Project

<a href="/en/project/LD14055" target="_blank" >LD14055: Unconventional Design Techniques for Intrinsic Reconfiguration of Digital Circuits: From Materials to Implementation</a><br>

Continuities

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Publication year

2015

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection

Abstracts Proceedings of International FLASH Conference

ISBN

978-80-214-5270-1

ISSN

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e-ISSN

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Number of pages

2

Pages from-to

52-53

Publisher name

Faculty of Electrical Engineering and Communication BUT

Place of publication

Brno

Event location

Brno

Event date

Oct 15, 2015

Type of event by nationality

WRD - Celosvětová akce

UT code for WoS article

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