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Regression Test Suites Optimization for Application-specific Instruction-set Processors and Their Use for Dependability Analysis

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26230%2F16%3APU121628" target="_blank" >RIV/00216305:26230/16:PU121628 - isvavai.cz</a>

  • Result on the web

    <a href="http://dx.doi.org/10.1109/DSD.2016.50" target="_blank" >http://dx.doi.org/10.1109/DSD.2016.50</a>

  • DOI - Digital Object Identifier

    <a href="http://dx.doi.org/10.1109/DSD.2016.50" target="_blank" >10.1109/DSD.2016.50</a>

Alternative languages

  • Result language

    angličtina

  • Original language name

    Regression Test Suites Optimization for Application-specific Instruction-set Processors and Their Use for Dependability Analysis

  • Original language description

    Nowadays, Application-specific Instruction-set Processors (ASIPs) are an important part of embedded systems, especially those which are utilized in Internet of Things (IoT). They can be optimized for high performance, small area or low power consumption by changes in their instruction set or by various changes in their hardware architecture. With fast prototyping of ASIPs, another very important issue arises. It is fast verification of such changes, ideally with optimized test suites, so comprehensive and long-running verification after every change can be avoided. In this paper, a new technique for building optimized regression suites for ASIPs is proposed which is based on the genetic algorithm. Experiments show that using this technique, reduction of the original test suite from first phase verification is significant, the new optimized regression suite remains strong in checking key functionality of an ASIP and a considerable improvement in the verification runtime can be achieved. Moreover, the paper shows a proposal of multi-domain application of the regression suites in evaluating dependability of FPGA-based ASIP prototypes.

  • Czech name

  • Czech description

Classification

  • Type

    D - Article in proceedings

  • CEP classification

  • OECD FORD branch

    10201 - Computer sciences, information science, bioinformathics (hardware development to be 2.2, social aspect to be 5.8)

Result continuities

  • Project

    <a href="/en/project/LQ1602" target="_blank" >LQ1602: IT4Innovations excellence in science</a><br>

  • Continuities

    P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>S - Specificky vyzkum na vysokych skolach

Others

  • Publication year

    2016

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    Proceedings of the 19th Euromicro Conference on Digital Systems Design

  • ISBN

    978-1-5090-2816-0

  • ISSN

  • e-ISSN

  • Number of pages

    8

  • Pages from-to

    380-387

  • Publisher name

    IEEE Computer Society

  • Place of publication

    Limassol Cyprus

  • Event location

    Limassol

  • Event date

    Aug 31, 2016

  • Type of event by nationality

    WRD - Celosvětová akce

  • UT code for WoS article

    000386638800050