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Conceptual and detail design of SW (TN01000029/4-V1) – 85%UNIS

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00532304%3A_____%2F20%3AN0000005" target="_blank" >RIV/00532304:_____/20:N0000005 - isvavai.cz</a>

  • Result on the web

  • DOI - Digital Object Identifier

Alternative languages

  • Result language

    angličtina

  • Original language name

    Conceptual and detail design of SW (TN01000029/4-V1) – 85%UNIS

  • Original language description

    SW single-channel programmable control units EHXX for aircraft turbine engines. The application area of application is GE turbine engines of the H series, which are currently controlled by analog ECUs and therefore have a fundamentally limited modifiability according to customer requirements. The EHXX control unit represents a part of the electronic engine control system in the aircraft unit. Its function is to process system inputs and set and control system outputs according to an internal algorithm.

  • Czech name

  • Czech description

Classification

  • Type

    R - Software

  • CEP classification

  • OECD FORD branch

    20205 - Automation and control systems

Result continuities

  • Project

    <a href="/en/project/TN01000029" target="_blank" >TN01000029: National Competence Centre for Aeronautics and Space</a><br>

  • Continuities

    P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Others

  • Publication year

    2020

  • Confidentiality

    C - Předmět řešení projektu podléhá obchodnímu tajemství (§ 504 Občanského zákoníku), ale název projektu, cíle projektu a u ukončeného nebo zastaveného projektu zhodnocení výsledku řešení projektu (údaje P03, P04, P15, P19, P29, PN8) dodané do CEP, jsou upraveny tak, aby byly zveřejnitelné.

Data specific for result type

  • Internal product ID

    EEC EHXX

  • Technical parameters

    SW architecture - divided into three parts: In Part 1, the processor is initialized. This initialization is performed whenever the power is connected to the processor or the processor is reset. During initialization, registry, pointer, and system settings are made. In Part 2, the interrupt setting is performed after the initialization is completed. Interrupts are set to events triggered by analog digital converters, frequency measurement modules, PWM generation modules for el. engines and timer. In the 3rd part of the architecture, the main SW loop is started. This is where periodic calls to the control logic function and output I / O settings take place. In parallel with the operation of the main loop, the I / O status and power control information is updated for the control logic based on the triggers. engine.

  • Economical parameters

    ------

  • Owner IČO

    00532304

  • Owner name

    UNIS, a.s.