Integrated Circuit Die Level Yield Prediction Using Deep Learning

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F03985181%3A_____%2F22%3AN0000001" target="_blank" >RIV/03985181:_____/22:N0000001 - isvavai.cz</a>
Result on the web
<a href="https://ieeexplore.ieee.org/document/9792526" target="_blank" >https://ieeexplore.ieee.org/document/9792526</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/ASMC54647.2022.9792526" target="_blank" >10.1109/ASMC54647.2022.9792526</a>

Result language
angličtina
Original language name
Integrated Circuit Die Level Yield Prediction Using Deep Learning
Original language description
P. Lenhard, A. Kovalenko and R. Lenhard, "Integrated Circuit Die Level Yield Prediction Using Deep Learning," 2022 33rd Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC), Saratoga Springs, NY, USA, 2022, pp. 1-6 Abstract—Given the integrated circuits (IC) production scale, the amount of process control monitoring PCM) data enable to develop an efficient algorithm for IC yield prediction at the die-level. Therefore, in addition to cost-effective and time-efficient yield evaluation, the proposed model is able to identify failed dice and low-yield areas on a wafer without any direct electrical die testing. Additionally, for non-parametric random dice failure detection that are untraceable by PCM input based models, an ensemble learning including both PCM and die defect inspection data are described. As Wafer Sort (WS) consumes a lot of time and resources with high associated cost a significant cost reduction can be achieved using smart product routing with selective WS by employing the aforementioned die level predictive model.
Czech name
—
Czech description
—

Project
<a href="/en/project/FW01010089" target="_blank" >FW01010089: Research and development of digital technologies for advanced semiconductor processes</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Publication year
2022
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
2022 33rd Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC)
ISBN
978-1-6654-9488-5
ISSN
2376-6697
e-ISSN
—
Number of pages
6
Pages from-to
1-6
Publisher name
IEEE
Place of publication
—
Event location
Saratoga Springs, NY, USA
Event date
May 2, 2022
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
—

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