Deep learning techniques for integrated circuit die performance prediction
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F03985181%3A_____%2F22%3AN0000002" target="_blank" >RIV/03985181:_____/22:N0000002 - isvavai.cz</a>
Result on the web
<a href="https://link.springer.com/article/10.1557/s43580-022-00308-0" target="_blank" >https://link.springer.com/article/10.1557/s43580-022-00308-0</a>
DOI - Digital Object Identifier
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Alternative languages
Result language
angličtina
Original language name
Deep learning techniques for integrated circuit die performance prediction
Original language description
Kovalenko, A., Lenhard, P. & Lenhard, R. Deep learning techniques for integrated circuit die performance prediction. MRS Advances 7, 683–688 (2022) Abstract Predicting integrated circuit (IC) functionality based on process control monitoring (PCM) parameters without individual die testing is a major challenge for manufacturers due to the high cost of electrical die measurement on the wafer. Complex dependencies between individual PCM parameters can be used to explain certain patterns of dice failure using Deep learning (DL) algorithms. However, random failure patterns due to process defects cannot be detected by this method. Combining PCM and in-process defect inspection data can be an ultimate prediction technique. In some cases, however, the availability of defect inspection data is much lower than the availability of PCM data, so direct ensemble training is rather ambiguous. This paper shows how to efficiently utilize both defect and PCM data to train a model to predict IC functionality. Such a hybrid model outperforms PCM-only solutions, and in contrast to a defect-only model predicts also failure areas across the wafer.
Czech name
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Czech description
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Classification
Type
O - Miscellaneous
CEP classification
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OECD FORD branch
20205 - Automation and control systems
Result continuities
Project
<a href="/en/project/FW01010089" target="_blank" >FW01010089: Research and development of digital technologies for advanced semiconductor processes</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2022
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů