A highly flexible reconfigurable system on a Xilinx FPGA
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F46747885%3A24220%2F14%3A%230003127" target="_blank" >RIV/46747885:24220/14:#0003127 - isvavai.cz</a>
Result on the web
<a href="http://www.scopus.com" target="_blank" >http://www.scopus.com</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/ReConFig.2014.7032531" target="_blank" >10.1109/ReConFig.2014.7032531</a>
Alternative languages
Result language
angličtina
Original language name
A highly flexible reconfigurable system on a Xilinx FPGA
Original language description
Runtime reconfigurable systems become more prevalent in numerous practical applications because these systems have a great flexibility. This paper presents a reconfigurable system implemented on Xilinx Field Programmable Gate Array (FPGA) where partial bitstream relocation (PBR), configuration memory readback and internal registers restoration techniques are supported. It can reduce a number of partial bitstreams stored in memory, save the implementation time and generally increase the flexibility of the reconfigurable system. The article describes a relocatable system creation where the relocation procedure is based on the bitstream major address modifications and design where the relocation of individual modules including their internal states is supported.
Czech name
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Czech description
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Classification
Type
D - Article in proceedings
CEP classification
JC - Computer hardware and software
OECD FORD branch
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Result continuities
Project
<a href="/en/project/LD13019" target="_blank" >LD13019: Improvement in Reliability of Nano-scale circuits</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>S - Specificky vyzkum na vysokych skolach
Others
Publication year
2014
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
2014 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2014
ISBN
978-1-4799-5943-3
ISSN
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e-ISSN
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Number of pages
6
Pages from-to
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Publisher name
Institute of Electrical and Electronics Engineers Inc.
Place of publication
Cancun; Mexico
Event location
Cancun; Mexico
Event date
Jan 1, 2014
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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