Sequential Test Decompressors with Fast Tester Bits Wide-Spreading

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F46747885%3A24220%2F17%3A00004250" target="_blank" >RIV/46747885:24220/17:00004250 - isvavai.cz</a>

Result on the web

<a href="http://www.worldscientific.com/doi/pdf/10.1142/S0218126617400011" target="_blank" >http://www.worldscientific.com/doi/pdf/10.1142/S0218126617400011</a>

DOI - Digital Object Identifier

<a href="http://dx.doi.org/10.1142/S0218126617400011" target="_blank" >10.1142/S0218126617400011</a>

Result language

angličtina

Original language name

Sequential Test Decompressors with Fast Tester Bits Wide-Spreading

Original language description

Usually, test pattern decompressors with dynamic reseeding are reset before starting a new test pattern decoding. The first few scan chain slices are then filled with test vectors that have lower decoding ability as the number of free variables is limited by the test access mechanism bandwidth. We have found that even within this limitation, it is possible to improve the decodability by creating fast and wide-spreading as many as possible independent linear combinations of the tester bits and using them for the scan chain loading. We evaluated features influencing the decompression quality and the hardware overhead for different decompressor principles. According to the evaluation results, we proposed a decompressor combining a XOR network and a linear feedback shift register (LFSR)-like automaton; we place the XOR network on the LFSR inputs. We demonstrate that due to this arrangement, the combined decompressor can be used without any phase shifter or state skipping ability of the LFSR. We have experimentally verified that adopting the proposed decompressor structure improves test coverage, saves the hardware resources and shortens the test application time.

Czech name

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Czech description

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Type

J_imp - Article in a specialist periodical, which is included in the Web of Science database

CEP classification

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OECD FORD branch

20206 - Computer hardware and architecture

Project

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Continuities

I - Institucionalni podpora na dlouhodoby koncepcni rozvoj vyzkumne organizace

Publication year

2017

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Name of the periodical

JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS

ISSN

0218-1266

e-ISSN

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Volume of the periodical

26

Issue of the periodical within the volume

8

Country of publishing house

SG - SINGAPORE

Number of pages

16

Pages from-to

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UT code for WoS article

000399226200002

EID of the result in the Scopus database

2-s2.0-85011536753