A method for verification of software written in Java for embedded systems
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F49777513%3A23520%2F05%3A00000008" target="_blank" >RIV/49777513:23520/05:00000008 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Alternative languages
Result language
angličtina
Original language name
A method for verification of software written in Java for embedded systems
Original language description
This article proposes a method of verification for embedded software written in Java in a distributed computer environment. The proposed method uses two kinds of computer-environment-control interface, between a computer node and its part of controlled d
Czech name
Metoda ověření programů v Javě pro vestavěné systémy
Czech description
Článek navrhuje metodu ověření programů psaných v jazyce Java a určených pro distribuované vestavěné systémy. Navrhovaná metoda užívá diskrétní simulaci s využitím programového nástroje J-Sim.
Classification
Type
D - Article in proceedings
CEP classification
JC - Computer hardware and software
OECD FORD branch
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Result continuities
Project
<a href="/en/project/GA102%2F03%2F0672" target="_blank" >GA102/03/0672: Research of methods and tools for verification of embedded computer system fault tolerance</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2005
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
New trends in system simulation
ISBN
80-86840-07-7
ISSN
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e-ISSN
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Number of pages
7
Pages from-to
13-19
Publisher name
MARQ
Place of publication
Ostrava
Event location
Krnov
Event date
Feb 22, 2005
Type of event by nationality
EUR - Evropská akce
UT code for WoS article
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