A new architecture of digital frequency synthesizer
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F49777513%3A23640%2F04%3A00000084" target="_blank" >RIV/49777513:23640/04:00000084 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Alternative languages
Result language
angličtina
Original language name
A new architecture of digital frequency synthesizer
Original language description
This paper describes architecture a new pure digital frequency synthesizer based on generators, counters and a register. The technique described here is much simpler then other method. Presented synthesizer is the most suitable for the design of VLSI arc
Czech name
Nová architektura digitálního syntezátoru frekvence
Czech description
Článek popisuje nový typ digitálního syntezátoru frekvence.
Classification
Type
J<sub>x</sub> - Unclassified - Peer-reviewed scientific article (Jimp, Jsc and Jost)
CEP classification
JA - Electronics and optoelectronics
OECD FORD branch
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Result continuities
Project
<a href="/en/project/LN00B084" target="_blank" >LN00B084: Research Centre for New Technologies in the Region of West Bohemia</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2004
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Name of the periodical
Journal of Electrical Engineering
ISSN
1335-3632
e-ISSN
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Volume of the periodical
54
Issue of the periodical within the volume
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Country of publishing house
SK - SLOVAKIA
Number of pages
5
Pages from-to
311-315
UT code for WoS article
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EID of the result in the Scopus database
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