Enhancing an x86_64 Multi-Core Architecture with Data-Flow Execution Support

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F61989100%3A27740%2F16%3A86093657" target="_blank" >RIV/61989100:27740/16:86093657 - isvavai.cz</a>
Result on the web
<a href="http://dl.acm.org/citation.cfm?id=2742896" target="_blank" >http://dl.acm.org/citation.cfm?id=2742896</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1145/2742854.2742896" target="_blank" >10.1145/2742854.2742896</a>

Result language
angličtina
Original language name
Enhancing an x86_64 Multi-Core Architecture with Data-Flow Execution Support
Original language description
Future exascale machines will require multi--/ many-core architectures able to efficiently run multi-threaded applications. Data-flow execution models have demonstrated to be capable of improving execution performance by limiting the synchronization overhead. This paper proposes to augment cores with a minimalistic set of hardware units and dedicated instructions that allow efficiently scheduling the execution of threads on the basis of data-flow principles. Experimental results show performance improvements of the system when compared with other techniques (e.g., OpenMP, Cilk).
Czech name
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Czech description
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Project
Result was created during the realization of more than one project. More information in the Projects tab.
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Publication year
2016
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
Proceedings of the 12th ACM International Conference on Computing Frontiers
ISBN
978-1-4503-3358-0
ISSN
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e-ISSN
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Number of pages
2
Pages from-to
411-412
Publisher name
ACM
Place of publication
New York
Event location
Ischia
Event date
May 18, 2015
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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