Smoothing Gate Capacitance Models for CMOS Radio Frequency and Microwave Integrated Circuits CAD

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F02%3A03074185" target="_blank" >RIV/68407700:21230/02:03074185 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Result language
angličtina
Original language name
Smoothing Gate Capacitance Models for CMOS Radio Frequency and Microwave Integrated Circuits CAD
Original language description
Convergence problems for both voltage- and charge-controlled models of MOSFET gate capacitances are often a limiting factor of CAD tools. In paper, an idea of exponential smoothing of model discontinuities is proposed. The method is demonstrated by smoothing the discontinuity of Meyer's model at zero drain-source voltage. The updated model is tested on flip-flop circuit by an advanced algorithm.
Czech name
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Czech description
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Project
<a href="/en/project/GA102%2F01%2F0432" target="_blank" >GA102/01/0432: Symbolic, semisymbolic and numerical methods of analysis, design and optimization of electrical circuits</a><br>
Continuities
Z - Vyzkumny zamer (s odkazem do CEZ)

Publication year
2002
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium - Digest of Papers
ISBN
0-7803-7246-8
ISSN
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e-ISSN
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Number of pages
4
Pages from-to
495-498
Publisher name
IEEE
Place of publication
Piscataway
Event location
Seattle
Event date
Jun 2, 2002
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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