Single-Level Partitioning Support in BOOM-II
Result description
We propose a modification of our Boolean minimizer BOOM-II enabling a single level partitioning. The disadvantage of all the present logic synthesis systems is that the minimization and decomposition phases are strictly separated; the minimization process is independent on the subsequent decomposition. We propose a method where the two-level minimization is driven by some decomposition or other constraints. Here a two level nature of a solution is retained, however, the circuit is divided into several stand alone blocks, each block having several outputs. Our aim is to minimize the number of inputs for each block, as well as the blocks' logic
Keywords
The result's identifiers
Result code in IS VaVaI
Result on the web
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DOI - Digital Object Identifier
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Alternative languages
Result language
angličtina
Original language name
Single-Level Partitioning Support in BOOM-II
Original language description
We propose a modification of our Boolean minimizer BOOM-II enabling a single level partitioning. The disadvantage of all the present logic synthesis systems is that the minimization and decomposition phases are strictly separated; the minimization process is independent on the subsequent decomposition. We propose a method where the two-level minimization is driven by some decomposition or other constraints. Here a two level nature of a solution is retained, however, the circuit is divided into several stand alone blocks, each block having several outputs. Our aim is to minimize the number of inputs for each block, as well as the blocks' logic
Czech name
Není k dispozici
Czech description
Není k dispozici
Classification
Type
D - Article in proceedings
CEP classification
JC - Computer hardware and software
OECD FORD branch
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Result continuities
Project
GA102/04/2137: Design of highly reliable control systems built on dynamically reconfigurable FPGAs.
Continuities
Z - Vyzkumny zamer (s odkazem do CEZ)
Others
Publication year
2004
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Proceedings of the International Workshop on Discrete-Event System Design - DESDes'04
ISBN
83-89712-15-6
ISSN
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e-ISSN
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Number of pages
6
Pages from-to
149-154
Publisher name
University of Zielona Gora
Place of publication
Zielona Gora
Event location
Dychow
Event date
Sep 15, 2004
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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Basic information
Result type
D - Article in proceedings
CEP
JC - Computer hardware and software
Year of implementation
2004