Design Methodology for High Reliable System

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F06%3A03121486" target="_blank" >RIV/68407700:21230/06:03121486 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Result language
angličtina
Original language name
Design Methodology for High Reliable System
Original language description
This paper deals with design methodology of high reliable digital system based on modified duplex system. Our modified duplex system is based on two FPGAs, where every FPGA can be reconfigured when a fault is detected. Design implemented in each FPGAs isbased on one of several methods how to ensure the self checking properties. Our design methodology reflects requirements on area overhead and value of dependability parameters. Our modified duplex system is compared with standard duplex system. Our dependability model and dependability calculations are used to quantify proposed solutions. Availability parameters have been calculated by dependability Markov models. The final reliable system is fault tolerant.
Czech name
Není k dispozici
Czech description
Není k dispozici

Project
<a href="/en/project/GA102%2F04%2F0737" target="_blank" >GA102/04/0737: Modern methods of digital system synthesis</a><br>
Continuities
Z - Vyzkumny zamer (s odkazem do CEZ)

Publication year
2006
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
Proceedings of the Seventh International Scientific Conference on Electronic Computers and Informatics ECI 2006
ISBN
80-8073-598-0
ISSN
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e-ISSN
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Number of pages
6
Pages from-to
274-279
Publisher name
Technická univerzita v Košiciach
Place of publication
Košice
Event location
Herl'any
Event date
Sep 20, 2006
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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