Pseudo-Random Pattern Generator Design for Column Matching BIST
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F07%3A03131715" target="_blank" >RIV/68407700:21230/07:03131715 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Alternative languages
Result language
angličtina
Original language name
Pseudo-Random Pattern Generator Design for Column Matching BIST
Original language description
This paper discusses possibilities for a choice of a pseudorandom pattern generator that is to be used in combination with the column-matching based built in self-test design method. The pattern generator should be as small as possible, whereas patternsgenerated by it should guarantee satisfactory fault coverage. Weighted random pattern generators offer this. Several weighted pattern generator designs are proposed and their effectiveness is evaluated in this paper. Moreover, two methods for computing the weights are compared. The column-matching method is primarily intended for a test-per-clock BIST, i.e., test patterns are applied to the tested circuit in parallel. Pseudorandom vectors obtained by an LFSR are modified here by a combinational circuit,to obtain deterministic test patterns. The number of inputs of this block corresponds to the width of the LFSR, the outputs correspond to the tested circuit inputs. This paper discusses possibilities of a reduction of the LFSR width.
Czech name
Pseudo-Random Pattern Generator Design for Column Matching BIST
Czech description
This paper discusses possibilities for a choice of a pseudorandom pattern generator that is to be used in combination with the column-matching based built in self-test design method. The pattern generator should be as small as possible, whereas patternsgenerated by it should guarantee satisfactory fault coverage. Weighted random pattern generators offer this. Several weighted pattern generator designs are proposed and their effectiveness is evaluated in this paper. Moreover, two methods for computing the weights are compared. The column-matching method is primarily intended for a test-per-clock BIST, i.e., test patterns are applied to the tested circuit in parallel. Pseudorandom vectors obtained by an LFSR are modified here by a combinational circuit,to obtain deterministic test patterns. The number of inputs of this block corresponds to the width of the LFSR, the outputs correspond to the tested circuit inputs. This paper discusses possibilities of a reduction of the LFSR width.
Classification
Type
D - Article in proceedings
CEP classification
JC - Computer hardware and software
OECD FORD branch
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Result continuities
Project
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Continuities
Z - Vyzkumny zamer (s odkazem do CEZ)
Others
Publication year
2007
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Article name in the collection
Proceedings of 10th Euromicro Conference on Digital System Design
ISBN
0-7695-2978-X
ISSN
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e-ISSN
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Number of pages
7
Pages from-to
657-663
Publisher name
IEEE Computer Society
Place of publication
Los Alamitos
Event location
Lübeck
Event date
Aug 27, 2007
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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