Random-Pattern Coverage Enhancement for BIST

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F46747885%3A24220%2F99%3A00000048" target="_blank" >RIV/46747885:24220/99:00000048 - isvavai.cz</a>

Result on the web

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DOI - Digital Object Identifier

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Result language

angličtina

Original language name

Random-Pattern Coverage Enhancement for BIST

Original language description

The paper presents a design method for Built-In Self Test (BIST) that uses a cellular automaton (CA) for test pattern generation. Similarly to the test pattern generators with linear feedback shift registers (LFSR) the CA can generate pseudorandom test patterns. The patterns correspond to code words or to linear combination of different code words of codes with non primitive irreducible polynomials and with higher minimal code distance of its dual code. The CA is formed by T flip-flops and does not contain any XOR in the feedback. We proposed a new scheme of BIST where the CA is formed by a modified scan chain. A number of experiments were done with ISCAS 85 and 89 benchmark circuits. The achieved fault coverage is better than that obtained with the help of patterns generated by LFSRs.

Czech name

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Czech description

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Type

D - Article in proceedings

CEP classification

JC - Computer hardware and software

OECD FORD branch

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Project

Result was created during the realization of more than one project. More information in the Projects tab.

Continuities

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>Z - Vyzkumny zamer (s odkazem do CEZ)

Publication year

1999

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection

Proceedings of IEEE European Test Workshop

ISBN

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ISSN

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e-ISSN

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Number of pages

2

Pages from-to

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Publisher name

IEEE

Place of publication

Německo

Event location

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Event date

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Type of event by nationality

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UT code for WoS article

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