Temperature distribution in solder joints during melting and solidification

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F15%3A00233978" target="_blank" >RIV/68407700:21230/15:00233978 - isvavai.cz</a>
Result on the web
<a href="http://dx.doi.org/10.1109/ATEE.2015.7133853" target="_blank" >http://dx.doi.org/10.1109/ATEE.2015.7133853</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/ATEE.2015.7133853" target="_blank" >10.1109/ATEE.2015.7133853</a>

Result language
angličtina
Original language name
Temperature distribution in solder joints during melting and solidification
Original language description
The most vulnerable components of electronic circuits (PCA - Printed Circuit Assembly) are the solder joints. During the soldering process different anomalies may occur (changes in the reflow temperature profile, different cooling rates) leading to the inception of some defects, as excessive voids inside the solder, brittle phase formation, concentration gradients of elements or metallurgical composition etc. To avoid this, it is mandatory to follow the parameter values of the reflow process (speed, temperature values etc.). Temperature computing model for two PCA samples during the reflow soldering process, by using Comsol Multiphysics software (heat transfer 3 D module) is presented in this paper. PCA samples with and without resistor contains substrate with two soldering pads together with lead free solder. To carry out the computations, the latent heat of fusion/solidification and the variation with the temperature of the alloy parameters were considered. The results show that the presence of the resistor leads to the decrease of the temperature in the alloy during melting and its increase during solidification.
Czech name
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Czech description
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Publication year
2015
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
2015 9th International Symposium on Advanced Topics in Electrical Engineering (ATEE 2015)
ISBN
978-1-4799-7514-3
ISSN
—
e-ISSN
—
Number of pages
7
Pages from-to
500-506
Publisher name
Institute of Electrical and Electronics Engineers
Place of publication
New York
Event location
Bucharest
Event date
May 7, 2015
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
000368159800095

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