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Precise Model of the Effective Threshold Voltage Changes in the DLS MOSFETs for Different Gate Angles Compared with Measured Data

The result's identifiers

  • Result code in IS VaVaI

    <a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21230%2F22%3A00373279" target="_blank" >RIV/68407700:21230/22:00373279 - isvavai.cz</a>

  • Result on the web

    <a href="https://doi.org/10.1109/AE54730.2022.9920095" target="_blank" >https://doi.org/10.1109/AE54730.2022.9920095</a>

  • DOI - Digital Object Identifier

    <a href="http://dx.doi.org/10.1109/AE54730.2022.9920095" target="_blank" >10.1109/AE54730.2022.9920095</a>

Alternative languages

  • Result language

    angličtina

  • Original language name

    Precise Model of the Effective Threshold Voltage Changes in the DLS MOSFETs for Different Gate Angles Compared with Measured Data

  • Original language description

    This paper presents an interesting phenomenon related to the effective threshold voltage changes (δVth,eff) in the diamond layout shape MOS transistors (DLS MOSFETs). Besides it, its analytical expression is presented here for the first time. The analytical approximative expression has been defined based on the results of the 3-D TCAD simulations for the different effective aspect ratio (W/L)eff and different angle α of DLS MOSFET. The effective aspect ratio has been set to 2.0, 1.5, 1.0, 0.5 with the angle α varied from 180° to 80° with the step 20°. Furthermore, for purpose to verify the 3-D TCAD simulation results and measurement results, 1 124 samples were fabricated, which were proportionally divided into rectangle layout shape (RLS) MOSFETs and DLS MOSFETs with the angles α equal to 120°, 100°, and 80°. All the samples have been fabricated in the 160 nm BCD technology process. The mentioned phenomenon described by the proposed expression fits the measured data with a very high level of accuracy equal to 99.995 %. Thus, the presented analytical expression proves its quality. Thanks to the high level of the expression quality, the given expression is recommended to use for the analog designs with high-level precision requests and DLS MOSFET components.

  • Czech name

  • Czech description

Classification

  • Type

    D - Article in proceedings

  • CEP classification

  • OECD FORD branch

    20201 - Electrical and electronic engineering

Result continuities

  • Project

  • Continuities

    S - Specificky vyzkum na vysokych skolach

Others

  • Publication year

    2022

  • Confidentiality

    S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Data specific for result type

  • Article name in the collection

    2022 International Conference on Applied Electronics (AE)

  • ISBN

    978-1-6654-9481-6

  • ISSN

    1803-7232

  • e-ISSN

  • Number of pages

    6

  • Pages from-to

  • Publisher name

    IEEE Xplore

  • Place of publication

  • Event location

    Plzeň

  • Event date

    Sep 6, 2022

  • Type of event by nationality

    WRD - Celosvětová akce

  • UT code for WoS article