Dependable Interconnection of Dependable Blocks

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21240%2F10%3A00169353" target="_blank" >RIV/68407700:21240/10:00169353 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Result language
angličtina
Original language name
Dependable Interconnection of Dependable Blocks
Original language description
This paper presents future work, which the main goal is to find a solution for interconection between reconfigurable blocks and keep fault secure parameters. Described method will use a partial reconfiguration to obtain self-repair ability. Our concept will be proved on a practical problem, which is implementing the railway station system in the FPGA.
Czech name
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Czech description
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Project
<a href="/en/project/GA102%2F09%2F1668" target="_blank" >GA102/09/1668: SoC circuits reliability and availability improvement</a><br>
Continuities
Z - Vyzkumny zamer (s odkazem do CEZ)<br>S - Specificky vyzkum na vysokych skolach

Publication year
2010
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
Proceedings of the Work in Progress Session SEAA 2010 and DSD 2010
ISBN
978-3-902457-27-1
ISSN
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e-ISSN
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Number of pages
2
Pages from-to
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Publisher name
Johannes Kepler University
Place of publication
Linz
Event location
Lille
Event date
Sep 1, 2010
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
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