Hardware-software co-design: A practical course for future embedded engineers

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21240%2F16%3A00300592" target="_blank" >RIV/68407700:21240/16:00300592 - isvavai.cz</a>
Result on the web
<a href="http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7525779" target="_blank" >http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7525779</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/MECO.2016.7525779" target="_blank" >10.1109/MECO.2016.7525779</a>

Result language
angličtina
Original language name
Hardware-software co-design: A practical course for future embedded engineers
Original language description
This paper describes the way how to teach the hardware-software co-design technique and basics of System-on- Chip (SoC) design and architecture on a practical example using state of the art AP SoC (All Programmable System on Chip) which combines FPGA logic and dual-core ARM Cortex-A9 CPU. Students are required to propose a new peripheral circuit in the FPGA logic and its interconnection with ARM CPU by an AXI4-Lite bus. This paper also presents the structure and results of these student's projects and the influence of previous courses oriented towards the general digital design in Informatics specialization intended for future embedded engineers.
Czech name
—
Czech description
—

Publication year
2016
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
Proceedings of the 5th Mediterranean Conference on Embedded Computing (MECO 2016)
ISBN
978-1-5090-2220-5
ISSN
2377-5475
e-ISSN
—
Number of pages
4
Pages from-to
347-350
Publisher name
Institute of Electrical and Electronics Engineers
Place of publication
Piscataway
Event location
Bar
Event date
Jun 12, 2016
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
000387159800088

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