Fault tolerance and resistance against side channel attacks in FPGA
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21240%2F17%3A00308055" target="_blank" >RIV/68407700:21240/17:00308055 - isvavai.cz</a>
Result on the web
<a href="https://alfresco.fit.cvut.cz/share/proxy/alfresco/api/node/content/workspace/SpacesStore/80beb5ab-bee2-40d2-a385-70f8313d9fc8/TR-FIT-17-03-Miskovsky.pdf" target="_blank" >https://alfresco.fit.cvut.cz/share/proxy/alfresco/api/node/content/workspace/SpacesStore/80beb5ab-bee2-40d2-a385-70f8313d9fc8/TR-FIT-17-03-Miskovsky.pdf</a>
DOI - Digital Object Identifier
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Alternative languages
Result language
angličtina
Original language name
Fault tolerance and resistance against side channel attacks in FPGA
Original language description
This report is an overview of side-channel attacks and countermeasures against them and fault-tolerant digital design methods with focus on a design for FPGAs. This overview serves as a source of knowledge for research of common and differing properties of fault-tolerant and attack-resistant design.
Czech name
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Czech description
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Classification
Type
O - Miscellaneous
CEP classification
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OECD FORD branch
20206 - Computer hardware and architecture
Result continuities
Project
<a href="/en/project/GA16-05179S" target="_blank" >GA16-05179S: Fault-Tolerant and Attack-Resistant Architectures Based on Programmable Devices: Research of Interplay and Common Features</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)
Others
Publication year
2017
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů