ZATPG: SAT-based Test Patterns Generator with Zero-Aliasing in Temporal Compaction
The result's identifiers
Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21240%2F18%3A00321779" target="_blank" >RIV/68407700:21240/18:00321779 - isvavai.cz</a>
Result on the web
<a href="https://www.sciencedirect.com/science/article/pii/S0141933118300966" target="_blank" >https://www.sciencedirect.com/science/article/pii/S0141933118300966</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1016/j.micpro.2018.05.001" target="_blank" >10.1016/j.micpro.2018.05.001</a>
Alternative languages
Result language
angličtina
Original language name
ZATPG: SAT-based Test Patterns Generator with Zero-Aliasing in Temporal Compaction
Original language description
Aliasing in test response compaction is an important source of fault coverage loss. Methods to avoid the aliasing mostly require modification of the compactor to some extent. This can lead to a higher compactor complexity and consequently to higher area overhead, longer signal propagation delays, etc. In contrast to this standard approach, we propose a novel method, the Zero-aliasing ATPG (ZATPG), which is able to reduce the aliasing for any compactor used, thus without need of the compactor modification or redesign. This is achieved by constraining the test pattern generation process (ATPG), so that patterns exhibiting no aliasing are produced directly. Aliasing in both the spatial and temporal compactors is assumed. The method is based on modification of very basic SAT-based ATPG principles, thus any SAT-based ATPG can be used for its purpose. Also, the method is general enough to be applicable to any compactor design. We demonstrate our method on MISR compactors based on LFSR and cellular automata, using the single stuck-at fault model. Our method is able to find a test with zero aliasing and complete fault coverage for smaller compactors than a conventional, unguided ATPG. Thus, the area overhead of the compactor can be reduced, while the complete fault coverage is preserved.
Czech name
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Czech description
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Classification
Type
J<sub>imp</sub> - Article in a specialist periodical, which is included in the Web of Science database
CEP classification
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OECD FORD branch
20206 - Computer hardware and architecture
Result continuities
Project
<a href="/en/project/GA16-05179S" target="_blank" >GA16-05179S: Fault-Tolerant and Attack-Resistant Architectures Based on Programmable Devices: Research of Interplay and Common Features</a><br>
Continuities
S - Specificky vyzkum na vysokych skolach
Others
Publication year
2018
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů
Data specific for result type
Name of the periodical
Microprocessors and Microsystems
ISSN
0141-9331
e-ISSN
1872-9436
Volume of the periodical
2018
Issue of the periodical within the volume
61
Country of publishing house
NL - THE KINGDOM OF THE NETHERLANDS
Number of pages
15
Pages from-to
43-57
UT code for WoS article
000441486700005
EID of the result in the Scopus database
2-s2.0-85048504988