SAT-Based Generation of Optimum Circuits with Polymorphic Behavior Support

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21240%2F19%3A00337144" target="_blank" >RIV/68407700:21240/19:00337144 - isvavai.cz</a>
Alternative codes found
RIV/00216305:26230/19:PU136084
Result on the web
<a href="https://doi.org/10.1142/S0218126619400103" target="_blank" >https://doi.org/10.1142/S0218126619400103</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1142/S0218126619400103" target="_blank" >10.1142/S0218126619400103</a>

Result language
angličtina
Original language name
SAT-Based Generation of Optimum Circuits with Polymorphic Behavior Support
Original language description
This paper presents a method for generating optimum multi-level implementations of Boolean functions based on Satisfiability (SAT) and Pseudo-Boolean Optimization (PBO) problems solving. The method is able to generate one or enumerate all optimum implementations, while the allowed target gate types and gates costs can be arbitrarily specified. Polymorphic circuits represent a newly emerging computation paradigm, where one hardware structure is capable of performing two or more different intended functions, depending on instantaneous conditions in the target operating environment. In this paper we propose the first method ever, generating provably size-optimal polymorphic circuits. Scalability and feasibility of the method are documented by providing experimental results for all NPN-equivalence classes of four-input functions implemented in AND–Inverter and AND–XOR–Inverter logics without polymorphic behavior support being used and for all pairs of NPN–equivalence classes of three-input functions for polymorphic circuits. Finally, several smaller benchmark circuits were synthesized optimally, both in standard and polymorphic logics.
Czech name
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Czech description
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Type
J<sub>imp</sub> - Article in a specialist periodical, which is included in the Web of Science database
CEP classification
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OECD FORD branch
20206 - Computer hardware and architecture

Project
Result was created during the realization of more than one project. More information in the Projects tab.
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Publication year
2019
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

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