A Design Space Exploration Framework for Memristor-Based Crossbar Architecture

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F68407700%3A21240%2F22%3A00357685" target="_blank" >RIV/68407700:21240/22:00357685 - isvavai.cz</a>
Result on the web
<a href="https://doi.org/10.1109/DDECS54261.2022.9770145" target="_blank" >https://doi.org/10.1109/DDECS54261.2022.9770145</a>
DOI - Digital Object Identifier
<a href="http://dx.doi.org/10.1109/DDECS54261.2022.9770145" target="_blank" >10.1109/DDECS54261.2022.9770145</a>

Result language
angličtina
Original language name
A Design Space Exploration Framework for Memristor-Based Crossbar Architecture
Original language description
In the literature, there are few studies describing how to implement Boolean logic functions as a memristor-based crossbar architecture and some solutions have been actually proposed targeting back-end synthesis. However, there is a lack of methodologies and tools for the synthesis automation. %More in detail, what is missing is a methodology able to optimize a given Boolean logic function for the memristor-based implementation. The main goal of this paper is to perform a Design Space Exploration (DSE) in order to analyze and compare the impact of the most used optimization algorithms on a memristor-based crossbar architecture. %The synthesized circuits are quantified in terms of area, energy consumption, and performance. The results carried out on 102 circuits lead us to identify the best optimization approach, in terms of area/energy/delay. The presented results can also be considered as a reference (benchmarking) for comparing future work.
Czech name
—
Czech description
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Project
<a href="/en/project/EF16_019%2F0000765" target="_blank" >EF16_019/0000765: Research Center for Informatics</a><br>
Continuities
P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)

Publication year
2022
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Article name in the collection
Proceedings of the 2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)
ISBN
978-1-6654-9431-1
ISSN
—
e-ISSN
2473-2117
Number of pages
6
Pages from-to
38-43
Publisher name
IEEE
Place of publication
Piscataway
Event location
Praha
Event date
Apr 6, 2022
Type of event by nationality
WRD - Celosvětová akce
UT code for WoS article
000835725500007

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