Transient of thermal stresses in printed circuit boards

Result code in IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F70883521%3A28110%2F11%3A43865257" target="_blank" >RIV/70883521:28110/11:43865257 - isvavai.cz</a>

Result on the web

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DOI - Digital Object Identifier

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Result language

angličtina

Original language name

Transient of thermal stresses in printed circuit boards

Original language description

Results of FEM modelling of thermal stress analysis in printed circuit boards are given in the article. It is shown that thermal stress alone is not solely caused by differences in coefficients of thermal expansion of individual layers. The emergence ofthermal stress is subject to both the layered structure of the wall and given boundary conditions, as well as the existence of a temperature gradient in the direction normal to the surface of the wall. A practical application focuses on the issue of recycling of PCB with the effort to achieve separation of layers due to thermal stress. Role modelling of thermal stress in this area lies in predicting the possibility of separation, depending on the type of thermal stress and material parameters.

Czech name

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Czech description

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Type

J_x - Unclassified - Peer-reviewed scientific article (Jimp, Jsc and Jost)

CEP classification

JP - Industrial processes and processing

OECD FORD branch

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Project

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Continuities

Z - Vyzkumny zamer (s odkazem do CEZ)

Publication year

2011

Confidentiality

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Name of the periodical

International Journal of Mechanics

ISSN

1998-4448

e-ISSN

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Volume of the periodical

5

Issue of the periodical within the volume

3

Country of publishing house

US - UNITED STATES

Number of pages

8

Pages from-to

226-233

UT code for WoS article

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EID of the result in the Scopus database

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