Design Method of Integrated Circuits in Education

Result code in IS VaVaI
<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F70883521%3A28140%2F15%3A43873837" target="_blank" >RIV/70883521:28140/15:43873837 - isvavai.cz</a>
Result on the web
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DOI - Digital Object Identifier
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Result language
angličtina
Original language name
Design Method of Integrated Circuits in Education
Original language description
This paper deals with the Transaction Level Modelling (TLM) and Register Transfer Level (RTL). The TLM is considered as a practical design approach to the high complexity of the system design. It is highly effective especially in the implementation of hierarchically-arranged system model. This situation is typical for HW/SW Co-design. The RTL covers lower-level design techniques and it is described on a gate level using the signals. Students try to work with both approaches and also solve particular tasks in tuition materials of the Gate Fields and Advanced Architecture of Processors courses. This approach brings better overview of design methods in terms of education; therefore, they can use the same programming language (SystemC) for design of integrated circuit and a firmware of the device.
Czech name
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Czech description
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Type
J<sub>x</sub> - Unclassified - Peer-reviewed scientific article (Jimp, Jsc and Jost)
CEP classification
IN - Informatics
OECD FORD branch
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Publication year
2015
Confidentiality
S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

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