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Verification of Asynchronous and Parametrized Hardware Designs
and verification of parametrized hardware designs. Considering the former contribution, we of verification is based on a translation of parametrized hardware designs to counter automata verification. A
JC - Počítačový hardware a software
- 2010 •
- Jx
Rok uplatnění
Jx - Nezařazeno - Článek v odborném periodiku (Jimp, Jsc a Jost)
Verification of Asynchronous and Parametrized Hardware Designs
verification. A parametrized hardware design translated to a counter automaton canWe introduce two original approaches to formal verification of hardware designs. In particular, we aim at model checking of circuits with mu...
IN - Informatika
- 2010 •
- B
Rok uplatnění
B - Odborná kniha
Verification of parametric concurrent systems with prioritised FIFO resource management
We consider the problem of parametric verification over a class of systems examine parametric verification of process deadlockability too. By reducing the parametric verification problems to finit...
JC - Počítačový hardware a software
- 2008 •
- Jx
Rok uplatnění
Jx - Nezařazeno - Článek v odborném periodiku (Jimp, Jsc a Jost)
A New Data Structure Based on Intervals
Traditional approaches to the verification of real-time systems deal values (e.g., integers). Parametric timed and counter models use parameters to define constraints over clocks or counters. Verification of automata ...
JC - Počítačový hardware a software
- 2004 •
- D
Rok uplatnění
D - Stať ve sborníku
Parametrizing and verification of the MACROS model for maize
GC - Pěstování rostlin, osevní postupy
- 1998 •
- Jx
Rok uplatnění
Jx - Nezařazeno - Článek v odborném periodiku (Jimp, Jsc a Jost)
Tools for Parametric Verification: A Comparison on a Case Study.
. The paper describes our experiences with parametric verification of multicast protocolProtocol analysis involve several parameters in model specification, for instance, transmission delay or the length of the transmitting window. ...
JC - Počítačový hardware a software
- 2004 •
- D
Rok uplatnění
D - Stať ve sborníku
Verification method for analog circuit diagnosis by parametr identification.
Annotation not available...
JA - Elektronika a optoelektronika, elektrotechnika
- 1993 •
- D
Rok uplatnění
D - Stať ve sborníku
High-Level Modelling, Analysis, and Verification on FPGA-Based Hardware Design
The paper presents high-level modelling and formal analysis and verification on an FPGA-based multigigabit network monitoring system called Scampi. Uppaal was applied in this work to establish some correctness and throughput results on a mod...
JC - Počítačový hardware a software
- 2005 •
- Jx
Rok uplatnění
Jx - Nezařazeno - Článek v odborném periodiku (Jimp, Jsc a Jost)
Tools for Parametric Verification. A Comparison on a Case Study
, for instance, transmission delay or the length of the transmitting window. Verification verification tools for timed models as HyTech, TReX and UPPaal
JC - Počítačový hardware a software
- 2004 •
- Jx
Rok uplatnění
Jx - Nezařazeno - Článek v odborném periodiku (Jimp, Jsc a Jost)
High-Level Modelling, Analysis, and Verification on FPGA-Based Hardware Design
The paper presents high-level modelling and formal analysis and verification on an FPGA-based multigigabit network monitoring system called Scampi. Uppaal was applied in this work to establish some correctness and throughput results on a mod...
JC - Počítačový hardware a software
- 2005 •
- D
Rok uplatnění
D - Stať ve sborníku
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