On the Influence of Thread Allocation for Irregular Codes in NUMA Systems

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216208%3A11320%2F09%3A10005301" target="_blank" >RIV/00216208:11320/09:10005301 - isvavai.cz</a>

Výsledek na webu

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DOI - Digital Object Identifier

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Jazyk výsledku

angličtina

Název v původním jazyce

On the Influence of Thread Allocation for Irregular Codes in NUMA Systems

Popis výsledku v původním jazyce

This work presents a study undertaken to characterise the FINISTERRAE supercomputer, one of the biggest NUMA systems in Europe. The main objective was to determine the performance effect of bus contention and cache coherency as well as the suitability ofporting strategies regarding irregular codes in such a complex architecture. Results show that: (1) cores which share a socket can be considered as independent processors in this context; (2) for big data sizes, the effect of sharing a bus degrades thefinal performance but masks the cache coherency effects; (3) the NUMA factor (remote to local memory latency ratio) is an important factor on irregular codes and (4) the default kernel allocation policy is not optimal in this system. These results allowus to understand the behaviour of thread-to-core mappings and memory allocation policies.

Název v anglickém jazyce

On the Influence of Thread Allocation for Irregular Codes in NUMA Systems

Popis výsledku anglicky

This work presents a study undertaken to characterise the FINISTERRAE supercomputer, one of the biggest NUMA systems in Europe. The main objective was to determine the performance effect of bus contention and cache coherency as well as the suitability ofporting strategies regarding irregular codes in such a complex architecture. Results show that: (1) cores which share a socket can be considered as independent processors in this context; (2) for big data sizes, the effect of sharing a bus degrades thefinal performance but masks the cache coherency effects; (3) the NUMA factor (remote to local memory latency ratio) is an important factor on irregular codes and (4) the default kernel allocation policy is not optimal in this system. These results allowus to understand the behaviour of thread-to-core mappings and memory allocation policies.

Druh

D - Stať ve sborníku

CEP obor

IN - Informatika

OECD FORD obor

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Projekt

<a href="/cs/project/7E08004" target="_blank" >7E08004: Quality Impact Prediction for Evolving Service-Oriented Software</a><br>

Návaznosti

P - Projekt vyzkumu a vyvoje financovany z verejnych zdroju (s odkazem do CEP)<br>Z - Vyzkumny zamer (s odkazem do CEZ)

Rok uplatnění

2009

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název statě ve sborníku

Parallel and Distributed Computing: Applications and Technologies

ISBN

978-0-7695-3914-0

ISSN

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e-ISSN

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Počet stran výsledku

8

Strana od-do

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Název nakladatele

IEEE Computer Society

Místo vydání

Neuveden

Místo konání akce

Hiroshima University, Hiroshima, Japan

Datum konání akce

8. 12. 2009

Typ akce podle státní příslušnosti

WRD - Celosvětová akce

Kód UT WoS článku

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