Utilizing the Bulk-driven Technique in Analog Circuit Design.

Kód výsledku v IS VaVaI

<a href="https://www.isvavai.cz/riv?ss=detail&h=RIV%2F00216305%3A26220%2F10%3APU86084" target="_blank" >RIV/00216305:26220/10:PU86084 - isvavai.cz</a>

Nalezeny alternativní kódy

RIV/60162694:G43__/10:00421723

Výsledek na webu

—

DOI - Digital Object Identifier

—

Jazyk výsledku

angličtina

Název v původním jazyce

Utilizing the Bulk-driven Technique in Analog Circuit Design.

Popis výsledku v původním jazyce

The last few decades, a great deal of attention has been paid to low-voltage (LV) low-power (LP) integrated circuits design since the power consumption has become a critical issue. Among many techniques used for the design of LV LP analog circuits, the Bulk-driven principle offers a promising route towards this design for many aspects mainly the simplicity and using the conventional MOS technology to implement these designs. This paper is devoted to the Bulk-driven (BD) principle and utilizing this principle to design LV LP building blocks of Current Mirror (CM), Enhanced Current Mirror (ECM), Operational Transconductance Amplifier (OTA), Current Conveyor (CCII) and Current Differencing Transconductance Amplifier (CDTA) in standard CMOS processes and supply voltage +-0.7V. The simulation results have been carried out by the Spice simulator using the 0.25u CMOS technology from TSMC.

Název v anglickém jazyce

Utilizing the Bulk-driven Technique in Analog Circuit Design.

Popis výsledku anglicky

The last few decades, a great deal of attention has been paid to low-voltage (LV) low-power (LP) integrated circuits design since the power consumption has become a critical issue. Among many techniques used for the design of LV LP analog circuits, the Bulk-driven principle offers a promising route towards this design for many aspects mainly the simplicity and using the conventional MOS technology to implement these designs. This paper is devoted to the Bulk-driven (BD) principle and utilizing this principle to design LV LP building blocks of Current Mirror (CM), Enhanced Current Mirror (ECM), Operational Transconductance Amplifier (OTA), Current Conveyor (CCII) and Current Differencing Transconductance Amplifier (CDTA) in standard CMOS processes and supply voltage +-0.7V. The simulation results have been carried out by the Spice simulator using the 0.25u CMOS technology from TSMC.

Druh

D - Stať ve sborníku

CEP obor

JA - Elektronika a optoelektronika, elektrotechnika

OECD FORD obor

—

Projekt

—

Návaznosti

Z - Vyzkumny zamer (s odkazem do CEZ)

Rok uplatnění

2010

Kód důvěrnosti údajů

S - Úplné a pravdivé údaje o projektu nepodléhají ochraně podle zvláštních právních předpisů

Název statě ve sborníku

13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems.

ISBN

978-1-4244-6610-8

ISSN

—

e-ISSN

—

Počet stran výsledku

4

Strana od-do

—

Název nakladatele

Neuveden

Místo vydání

Vienna, Austria

Místo konání akce

Vienna

Datum konání akce

14. 4. 2010

Typ akce podle státní příslušnosti

WRD - Celosvětová akce

Kód UT WoS článku

—